CMOS TECHNOLOGIES AND SILICON BIPOLAR TRANSISTORS

CMOS and silicon bipolar devices and circuits currently are responsible for the majority of wireless communication hardware. Silicon technology has a long history for digital signal processing, VLSI, A/D and D/A converters. CMOS based radio has been steadily progressing toward higher frequencies. State-of-the-art CMOS uses the 0.18 process. CMOS is currently the workhorse for wireless up to 800 MHz. Substantial effort is being expended worldwide to extend the frequency to 1.9 GHz, 2.5 GHz and 5 GHz ranges. One of the major drawbacks for silicon devices used for RF applications is the low resistivity of silicon, causing substrate loss. This problem causes low Q of passive circuits, particularly for inductors. Much effort is spent to enhance the capability of silicon circuits by, e.g., elevating the inductor from the chip to increase Q and by introducing SOI (silicon on insulator) technology for power and speed.

Philips Research Laboratories have been working on "silicon-on-anything" devices based on the bipolar process with the circuits transferred to a range of insulating substrates such as glass (Fig. 5.1). In this way the parasitic capacitance is reduced, and high-quality RF passive components can be integrated on the chip. They have manufactured RF devices, including a bipolar transistor with an active emitter of only 0.05 square micrometers and with proportionately smaller junction capacitances. This resulted in low power consumption with only 15 at the cut-off frequency of 10 GHz. One example of the chips is a fully integrated LC-type VCO including a phase-locked-loop frequency synthesizer and divider chain for local area networks (LANs).

Much effort has been expended to improve performance by changing the device fabrication process. For example, Philips has proposed a double-poly-transistor with SiGe in-situ grown base (Fig. 5.2). The traditional base contacts are eliminated. Instead, the base contacts are poly-silicon strips on a thick oxide layer. The base layer is grown into the narrow opening in the oxide and automatically contacts the poly-silicon strips. Finally, heavily n-doped poly-silicon is deposited to form the emitter. Adding 10 to 20% Ge to the base layer offers new possibilities to adjust device parameters.

Fig. 5.1. An example of a silicon-on-anything circuit by Philips Research Laboratory.

Fig. 5.2. Double-poly transistor by Philips Research Laboratory.

Although it has not used CMOS, NEC has utilized Si nMOSFETs (field-effect transistors) for both a low frequency (900 MHz) amplifier for GSM and high frequency (Ku band) amplifier (Fig. 5.3). Since the substrate is lossy, the amplifier design for 900 MHz makes use of the loss matching technique to obtain an unconditional stability from a conditionally stable design to obtain a power added efficiency (PAE) of 62% with the power output Pout of 27 dBm. The device uses two-generation old 0.6 technology. For the Ku band amplifier based on 0.18 nMOS (with fT of 50 GHz and fmax of 45 GHz), the substrate loss is too significant to use the same approach. Therefore, the transmission line structures for the circuit are modified (Fig. 5.4). For "Type A" modification, microstrip lines are placed on a polyimide layer that is in turn placed on Si substrate via SiO2 and SiON isolation layer. In "Type B," a thin-film microstrip line that has an Al layer inserted in the SiON and SiO2 layers is used. The insertion loss is about 1 dB/cm. The amplifier gain is 10 dB with a noise figure of 4 ~ 5 dB in Ku band.

One technology that has drawn recent attention is SOI (silicon on insulator). Recently IBM announced that it plans to use SOI technology to manufacture a range of logic integrated circuits (ICs). IBM's first 0.22 micron SOI devices were scheduled to be used in Apple Computer Inc.'s Macintosh systems and in IBM servers, perhaps by early in the year 2000. IBM is also developing 0.18 and 0.13 micron processes for 1 GHz microprocessors. Along with up to 30 percent performance gains, SOI could improve power consumption by 30 to 50 percent. Because SOI's advantage is more pronounced at low-voltage operation, the technology is suitable for mobile applications, with reasonable RF performance at single-volt supply voltages well above a few GHz. Similarly, Motorola is preparing an SOI BiCMOS process for RF/IF circuits for cellular phone applications.

Fig. 5.3. nMOSFET characteristics by NEC.

Fig. 5.4. Transmission lines on an Si substrate used by NEC.

Many modern wireless communication systems use digitally modulated signals. Therefore, at some point this digital information needs to be extracted so that DSP can take over. Much work has been carried out for the direct conversion receiver. Central to this scheme are AD and DA converters. Although there is a need to place this A to D conversion scheme as close to the antenna as possible, the performance of the AD and DA converters set the limit (Fig. 5.5). The bit rate and the frequency are in a trade-off relationship. Analog to digital conversion improves 1 bit/3 years according to Philips, and CMOS AD conversion may slow down due to low VDD. In fact, a good rule of thumb to describe a figure-of-merit of the AD converter is given by

F = log2(Sampling Speed) + Resolution (given as Effective No. of bits)

For the state of the art, this F value ranges from 38 to 40 at the moment. For example, for 1 GHz speed with 10 bits of resolution, F becomes 40.

Fig. 5.5. Recent and projected trends for AD conversion for 1990-2002 (Philips).


Published: July 2000; WTEC Hyper-Librarian