OVERVIEW OF COLLABORATIVE PROJECTS IN JAPAN AND THE UNITED STATES

Japan has used all three types of collaborative project in funding both low temperature superconductivity (LTS) and HTS SCE research over the past 20 years. In the United States, only joint ventures and distributed projects have been used. No centralized projects have been established in SCE in the United States. (Sematech and MCC are examples of centralized industrial R&D activities in U.S. semiconductor R&D.)

Japan's collaborative SCE projects are shown in Table 8.1, which gives the starting date, the research topic, the lifetime, and the style according to the three categories described above. To date, two projects of each style have been created, with lifetimes varying from 4 to 10 years -- or, in the case of the International Superconductivity Technology Center (ISTEC) in its second phase, 15 or 20 years.

Table 8.1
Japanese Consortia in Superconducting Electronics Projects

Project Name

Start

Years

Style*

Josephson Computer Project

1981

10

D

Superconducting Sensor Laboratory (SSL)

1990

6

C

Research & Development Association for Future Electron Devices (FED)

1988

10

D

International Superconductivity Technology Center (ISTEC)

1988

10

C

AMTEL (ALPS Electric and Denso)

1994

6

J

"Western Alliance" (Matsushita, Sumitomo, and Kyocera)

1995

4

J


* C = Centralized: shared facilities, even new laboratory buildings
J = Joint venture: coordinated projects across a number of laboratories
D = Distributed: funding to a number of laboratories for related but not coordinated work

In the United States, of the six collaborative activities in SCE (Table 8.2), five were (roughly speaking) joint ventures, while one was a distributed activity. In contrast to Japan, no new U.S. projects in SCE are planned, and all the current ones except the 32 x 32 switch will end in 1998.

Table 8.2
U.S. Consortia in Superconducting Electronics Projects

Project Name

Start

Years

Style*

High Temperature Superconducting Space Experiment (HTSSE) I

1988

5

J

High Temperature Superconducting Space Experiment (HTSSE) II

1992

5

J

Consortium on Superconducting Electronics (CSE)

1989

7

J

University Research Initiative (URI)

1992

5

D

Advanced Technology Program (ATP) Joint Venture

1992

5

J

128x128-Switch Project

1988

On-going

See Below

Vapor Phase Manufacturing

1995

3

D


* C = Centralized: shared facilities, even new laboratory buildings
J = Joint venture: coordinated projects across a number of laboratories
D = Distributed: funding to a number of laboratories for related but not coordinated work Although the work and results of many of these projects in Japan is described elsewhere in this report, the following brief review of all the activities in both countries might be of value. Table 8.3 presents a summary of the R&D objectives of the consortia activities.

Table 8.3
R&D Objectives of SCE Consortia in Japan and the United States

R&D Objectives

Japan*

United States†

LTS digital circuits

  • voltage state
  • RSFQ

 

Josephson Computer Project

--

 

URI

URI

LTS digital systems

  • computer
  • switch

 

Josephson Computer Project

FED

 

--

32 x 32 switch

ATP

LTSQUID systems

SSL

--

HTS materials -- films

ISTEC (SRL)

CSE

Large area film manufacturing technology

--

Vapor Phase

RF/microwave devices

AMTEL

Western Alliance

CSE

HTSSE I

RF/microwave systems

AMTEL

Western Alliance

HTSSE II

HTSQUID

  • sensors
  • systems

 

SSL

SSL

 

CSE

--

HTS digital devices

FED

ISTEC

Conductus

Northrop Grumman

TRW



* Key to names of Japanese programs:
AMTEL (Advanced Mobile Telecommunications Technology Laboratory) consists of ALPS Electric and Denso
FED = Future Electron Devices Research and Development Association ISTEC = International Superconductivity Technology Center (MITI) SRL = Superconductivity Research Lab
SSL = Superconducting Sensor Lab (MITI)
Western Alliance consists of Matsushita, Sumitomo, and Kyocera

† Key to names of U.S. programs
32 x 32 switch = U.S. government projected targeted at high-performance computing
ATP = Advanced Technology Program (DOC)
CSE = Consortium for Superconducting Electronics, which consisted of Bell Labs, IBM, MIT, and MIT Lincoln Laboratory, and later, Conductus and CTI (BU, Cornell, SUNY Stony Brook)
HTSSE (I and II) = High Temperature Superconducting Space Experiment (DARPA)
URI = University Research Initiative (DOD)


Published: July 1998; WTEC Hyper-Librarian