SI-BASED NANODEVICES

K. Ismail
IBM T.J. Watson Research Center, Yorktown Heights, NY 10598
Department of Electrical Engineering, Cairo University, Egypt

Silicon is currently the material most heavily used in the semiconductor industry, in particular in logic and memory applications. The devices made thereof are in most of the cases metal oxide semiconductor field-effect transistors (MOSFETs), with the exception of a few applications that still use bipolar transistors. As device scaling continues, the active parts of the devices are inevitably going to be measured in hundreds of nanometers or less.

In the past 15 years, there has been an increasing interest in exploring physical phenomena such as resonant tunneling, Coulomb blockade, ballistic transport, and quantized conductance, to name a few. Most of these studies have been conducted on III-V-based materials or on metal/oxide/metal configurations. Many striking observations have been made in these material systems, but so far these remain of limited use. Therefore, there is a clear tendency to explore the possibility of combining Si technology with these interesting physical phenomena in order to come up with a new breed of devices that maybe useful in the future. Furthermore, the fact that the bandgap of Si is indirect has limited the use of Si in optoelectronic applications. However, the use of heterostructures and nanoparticles may help alleviate this limitation, which would pave the way to the full integration of optoelectronics with digital logic and memory devices.

In response to the above needs, there has been a great deal of emphasis in the past few years on examining nanodevices in Si and in Si-based heterostructures. Three main directions have been taken by various groups interested in this field.

The first direction is to shrink the size of conducting Si islands to the limit where their associated capacitance is so small that the charging energy of the Si islands is higher than the thermal broadening. That design is based on SOI MOSFET processing steps, except for the step needed to form the ultrasmall island, which relies on electron beam lithography and repetitive oxidation. Several groups worldwide (mostly in Japan) have demonstrated working devices that clearly exhibit the Coulomb blockade manifested in current steps as a function of transistor bias. The remaining questions are related to the manufacturability of such devices, their potential integration in standard CMOS, or their use in stand-alone applications.

The second direction is to resort to Si-based heterojunctions to build resonant tunneling and modulation-doped structures, and many other structures that have been previously demonstrated only in III-V-based heterostructures. The most heavily studied material system in this direction is that of strained Si/SiGe, which allows the creation of Si electron quantum wells cladded between SiGe barriers. Modifications can be achieved by adding C to the alloy. More exotic heterostructures involve metals or metal alloys. In strained Si/SiGe, which leaves Si quantum wells under tensile strain, the electron transport properties are modified and allow for investigation of many interesting phenomena that rely on long electron mean-free paths. A novel effect was recently discovered that leads to pronounced negative differential conductance in such devices. Possible memory applications may be based on this effect.

In addition, the fact that Si and Ge are grown under strain, caused by the lattice mismatch, allows for the growth of Ge islands embedded in a matrix of Si. The tendency to island is a result of the strain and the consequent Stranski-Kastranov growth mode. Together with the growth of Si/Ge atomic layer superlattices, such devices may hold promise for novel optical sources. Preliminary results indicate that the luminescence from such structures is already orders of magnitude stronger than in bulk Si.

The third direction is that of creating Si or Ge nanocrystals embedded in the SiO2 gate dielectric. Presence of such nanocrystals in an otherwise standard MOSFET process allows for a shift in threshold voltage due to charging and discharging these nanocrystals through the gate tunneling currents. Such an effect holds promise to be useful in future memory applications and is currently under investigation by various groups.

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Published: January 1998; WTEC Hyper-Librarian