DEFENSE ADVANCED RESEARCH PROJECTS AGENCY ULTRA ELECTRONICS: ULTRA DENSE, ULTRA FAST COMPUTING COMPONENTS

Gernot Pomrenke
DARPA/ETO

The Ultra Electronics program of the Defense Advanced Research Projects Agency (DARPA) offers a platform for advanced microelectronics research in support of nanoelectronic technologies. The goals of the Ultra Dense, Ultra Fast Computing Components program are to explore and develop material, processing technologies, quantum and conventional devices, and device architectures for a next generation of information processing systems and subsystems. The Ultra program seeks improved speed, density, power, and functionality beyond that achieved by simply scaling transistors. These improvements should manifest themselves in systems operating at room temperature at speeds 10 to 100 times faster than current systems, denser by a factor of 5 to 100, and lower-power by a factor of more than 50.

The initial goals of the Ultra Electronics program were to explore, assess, and benchmark alternative electronic approaches to embedded and stand-alone computing architectures. The program has demonstrated methods for applying novel quantum well electronic devices to improve densities of integrated electronic devices, methods of improving the control of epitaxial deposition to realize these devices, efficacy of resonant tunneling devices with respect to speed and reduced power, and techniques for monolithic and hybrid integration of devices based on gallium arsenide (GaAs), indium phosphide (InP), and silicon. Other achievements include developing nanoprobes to study nanometer material structures and devices with picosecond time resolution.

The subsequent phase has been to develop further the most promising approaches. A specific program thrust includes the design, fabrication, and testing of electronic devices with critical feature sizes well below 0.1 micron. Other thrusts include developing silicon-based nanoelectronics, chemical self-assembly techniques and improved semiconductor processing, and molecular beam epitaxy (MBE) in-situ process control and other fabrication techniques for future quantum device-based electronics. Silicon-germanium-carbon (SiGeC) -based devices are being developed to enable scaled silicon nanoelectronics. Lift-off techniques are being explored to enable combining III-V quantum device and standard CMOS electronics. These approaches will allow nanoelectronics to leverage all the continuing improvements of conventional electronic devices while providing the functional improvements of nanoelectronics. Other aspects of the program focus on developing high speed supercomputer visualization, examining the potential of single-electron devices, exploring nanolithography that targets patterning with critical dimensions below 50 nanometers, and examining fundamental issues associated with molecular electronics. A continuous interest exists to examine nanoelectronic technologies that take nontraditional approaches to enable advanced electronics beyond scaled silicon.

ULTRA Electronics

Ultra Dense Ultra Fast Computing Components/ Nanoelectronics

PROGRAM GOALS: The goal of the program is to explore microelectronics device technologies which will achieve massive computer operations (trillions ops/sec), massive storage (terabits/cm2), and extremely low power (nanowatts/gate) to enable performance requirements for real-time battlefield analysis, grand challenge problem solving, language processing, and multi-tasking.

The program investigates materials, processing technologies, quantum and conventional devices, circuits and architecture to develop sub 100 nm room temperature electronic components for speed, density, and power characteristics beyond current silicon transistor scaling trends. Specifically, it demonstrates

The program seeks innovative approaches and fundamental new strategies which will enable revolutionary advances in the science and technology of ultra small electronic devices to realize computation, signal processing, and storage requirements beyond the next generation military systems.



*THE STATIC POWER DISSIPATION OF RTD/TRANSISTOR LOGIC IS ONE-THIRD TO ONE-SIXTH THAT OF CONVENTIONAL III-V TRANSISTOR LOGIC FAMILIES.



Quantum Circuits and Systems
Q-effect devices combined with conventional devices
Si-based tunneling devices and QMOS circuits
CMOS integration
Hybrid
Demos -- ADC, FIFO, high speed electronics for optical networks, processors, nanoprocessors

Massive Memory
Quantum effect
Nanomagnetics and nanoprobes
SET/FET

Devices
Quantum effect (tunneling, QCA, single electron, Q-dots, ...)
Molecular electronics / single molecule electronics
Hybrid
Novel (DNA, cellular-biological)

Architecture and Interconnected Systems
RTD-based
Multivalued
Multilevel
Optoelectronics

Materials, Processing, and Characterization
Materials and structures
Growth and process control

Chemical engineering
Diagnostics

Fundamental Device Physics, Modeling, Computer Visualization, and CAD

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Published: January 1998; WTEC Hyper-Librarian