R&D on and production interest in polysilicon technology for active matrix LCDs are growing. The primary attraction is that "the cost of the external VLSI drive electronics is the largest component cost in an LCD system....If it becomes practicable, the p-Si TFT will be a promising display device, as its driver circuits can be formed at the same time on the same glass substrate as the panel" (Minami, 1991).
P-Si is perceived to be able to provide higher aperture ratio displays at high pixel densities (Matsueda, 1991). Additionally, for high pixel densities the interconnect problem becomes intractable. Tape Automated Bonding (TAB) is capable of about 100 śm pitch at best. Thus p-Si is the technology of choice on both counts for projection technology. What primarily drives p-Si R&D is the potential for cost reduction and improved reliability by integrating the display drive circuitry onto the active matrix substrate and eliminating the huge number of interconnections to external VLSI drive circuitry.
Seiko-Epson, the industry pioneer, continues to perform R&D and production. The motivation is primarily to use the technology for small display products such as camcorder viewfinders and projection light valves. Sony recently announced its entry into the production of p-Si devices for viewfinders. Viewfinder components were demonstrated at Japan Electronics Show '91. Indeed, the two Japanese R&D consortia, GTC and HDTEC, have focused on p-Si in developing, respectively, the next generation direct-view HDTV-on-the-wall and projection HDTV. Hitachi management has identified 1995 as the point of dramatic volume expansion and believes that if this is to occur, p-Si technology, with its integrated drive technology, will be necessary.
The polysilicon active matrix fabrication process is relatively simple. It minimally requires about five mask steps. Figure 5.17 shows diagrammatically how polysilicon thin-film transistors are fabricated. Most of the processes are very similar to bulk silicon VLSI processes. Herein lie both an advantage and a disadvantage. The advantage is that tremendous experience exists in these process technologies, albeit at much smaller substrate sizes. The disadvantage is that many of these processes require high temperatures and are potentially expensive to scale up in area or difficult to scale down in temperature.
Seiko-Epson has demonstrated a prototype 9.5-inch diagonal p-Si active matrix display. This is perhaps the largest polysilicon display prototype to be demonstrated to date. This display was fabricated using a process with a maximum temperature of 600 degrees centigrade. Using thin devices, about 25 nm thick, ON/OFF ratios of greater than 1E7 were demonstrated (Little, 1991).
Figure 5.17. Poly-Silicon Active Matrix Fabrication Process
Researchers at Asahi Glass Research Center demonstrated comparable ON/OFF ratios using a process with a maximum temperature of 450 degrees centigrade. At this temperature many available hard glasses could be used as display substrates. These researchers did this work on Asahi non-alkaline glass (Endo, 1991). Much of this work continued their earlier work in which Asahi described a self-aligned 450 degrees centigrade process using a non-mass separated ion implantation (Yuki, 1990).
Researchers at Sony demonstrated 44% aperture ratio viewfinder displays with 42 microns x 48 microns pixels using their Superthin Film Transistor (SFT) polysilicon technology. SFTs with lightly doped drains were specifically developed to reduce leakage in the pixel transistors. Both horizontal and vertical drive circuitry was integrated onto the display using CMOS SFTs (Hayashi, 1990).
One of the issues with polysilicon is that leakage currents tend to be high. Researchers at NTT proposed and demonstrated a new type of TFT which they term a Field Induction Drain (FID) TFT. This TFT has lower off current than a conventional one; indeed they have demonstrated an improvement of about 100 (Tanaka, 1991).