Most of the AMLCDs are manufactured at the sites of existing facilities where electronic components, ICs, and LCDs are already produced. Thus, an existing infrastructure and experienced manufacturing organizations are available to initiate and support new and complex facilities. The initial AMLCDs were manufactured in modified IC clean room facilities. During 1991 a number of new, large facilities were constructed at existing manufacturing sites such as Tenri (Sharp) and Himeji (Toshiba/IBM Japan - DTI). The new investment at these locations is $200-400 million. Because of the limited availability of land, multistory clean rooms have been built, with elevator transport of substrates between floors.

A summary of some 10-inch color TFT/LCD VGA production lines is shown in Table 3.1. The total investment and sales goals are shown in Table 3.2.

Table 3.1
Some 10-inch Color TFT Production Lines

Table 3.2
Sales and Investment Plans of LCD Suppliers

Manufacturing Process

Most manufacturers use very similar TFT and LCD fabrication processes. An example of the TFT process is summarized in Figure 3.1. A possible variation of this process is to replace the top SiN deposition by a N+a-Si deposition (SiN/a-Si/n+a-Si). This necessitates the use of a very thick a-Si layer because there is no etch stop for the n+ etch on the intrinsic a-Si. Both wet etching and dry etching are used to pattern the thick film layers. Some companies use precoated ITO substrates; thus, the first step is to pattern and etch the layer. Careful inspection of substrates is absolutely necessary, given the immaturity of the manufacturing process. The precise process monitoring procedures are not revealed, but most inspection techniques are optical and electrical.

. The liquid crystal process, while not devoid of problems and yield issues, is much more mature because of its similarity to supertwisted nematic (STN) production process tools. Process optimization to provide good viewing angle and uniformity is significantly different for AMLCDs, but the equipment and production techniques are similar. The cover-plate color-filter process is extremely important; it can be a very expensive process because of high materials cost and low yield. Various processes can be used to fabricate color filters. dye and pigment filters are most commonly used, as described in Chapter 2. At the moment, most AMLCD manufacturers buy cover filter plates from an outside vendor such as Toppan Printing or DAI Nippon Printing.

Clean Room Layout

Large custom buildings have been constructed, with each floor 4000-6000 square meters and with 1800-5000 square meters of clean room space per floor.

Schematic layouts of three of the new clean room facilities are shown in Figures 3.2, 3.3, and 3.4. The LCD process equipment was often arranged ergonomically in a process flow sequence, whereas in the TFT line the equipment was often arranged in a clustered area of photolith and wet etching, CVD, sputtering, and dry etch. The lack of complete in-line process flow layouts reflects the immaturity of the process. The cluster areas allow for flexibility of process maturing. The lithography areas with wet etch are commonly Class 10. Much of the area is Class 100 for sputter and CVD loading, with the rest Class 1000-5000. The large PECVD and sputtering machines are mostly situated outside the clean room, with the loading and unloading stations inside the clean room.

It is expected that when all floors are utilized, some of these facilities will be capable of producing 1 million VGA displays per year in 10,000-16,000 square meters of clean room.

Figure 3.1. Process for a-Si TFT Array

Figure 3.2. Process Layout

Figure 3.3. Plant Layout

Figure 3.4. Plant Layout

In these production lines the JTEC committee saw 4-12 steppers with 4-6 large PECVDs and large numbers of dry etch machines, indicating their low throughput.

At the initial level of operation of 20,000-40,000 VGAs per month, there will be 70-120 operators and engineers per shift, with a three-shift-per-day operation. From 50% to 60% of these people will work on the TFT line, with the rest equally distributed between LCD process and assembly. The cycle times are as follows:

This implies that 20,000-30,000 substrates will reside in the TFT line at any one time, presenting a major storage and logistics problem. Many of the engineers have had IC photo-semiconductor or LCD production experience.

Transportation and Automation

The substrates used in the new facilities are Corning 7059; in size they range between 300 x 400 mm and 350 x 450 mm. The substrates are transported and stored in cassettes that hold approximately 25 substrates. How the substrates are transported between equipment varies from one facility to another:

With the AGV systems, substrates are often transferred by robots to a station close to the process equipment. Often the substrates are loaded manually onto noncassette equipment such as CVD and sputtering units. Automated robotic loading is being evaluated for this purpose but is not yet functioning satisfactorily.

Throughput Yield

Given the high cost of capital equipment, high yield and throughput must be achieved to achieve low manufacturing cost.

The throughput is strongly influenced by processing time and equipment downtime for cleaning and maintenance. Lithography and, in particular, PECVD are the most critical areas in which equipment limits throughput of AMLCD manufacturing facilities. Because there are many (6-10) masks in the process, lithography is critical and strongly influences productivity. Resist deposition by spinning has a throughput of around 1 substrate per minute. Lithography stepper throughput is dependent on the number of reticles used for the exposure. For symmetric repetitive patterns, a single mask can be stepped across the substrate to expose the layer pattern by stitching together exposures. For nonrepetitive patterns, such as the final metalization, multiple reticles must be used to expose the entire substrate. Reticle change time significantly decreases throughput, which can be greater than 1 minute per substrate for multiple reticles.

The most critical issues of throughput and yield are in the PECVD process. Up to eight substrates are processed in a batch, with a minimum tact time of 10 minutes in an Anelva multichamber system. The tact time consists of substrate transfer time between chambers and heating and deposition time. However, the biggest issue with PECVD is the relatively long downtime needed for equipment cleaning. In production, cleaning may be needed after 3-15 days of operation. Cleaning is extremely important to achieve high yield through maintaining low levels of particulate. The deposition chambers have to be cooled to room temperature to be mechanically cleaned. Plasma etching of the stainless steel chambers at the deposition temperatures of 250-350 degrees centigrade is not possible because the stainless steel is attacked, producing carbon deposit and generating additional particles.

Considerable improvement is also required in dry etching throughput.

Yield still remains the most critical and elusive challenge in manufacturing AMLCDs. Given the confidential nature of the subject, there is little precise information on manufacturing yield. There have recently been reports that a few companies are achieving >50% yield in manufacturing VGA displays. There is no way of substantiating this information, but it is clear that all the major display manufacturers are putting considerable emphasis on improving yield of AMLCDs. It also should be noted that the volume of AMLCD VGA displays produced in 1991 was considerably less than some forecasts had predicted.

Some of the major issues in achieving high yields are as follows:

  1. Particulates generated in PECVD and sputtering. The deposition of a-Si and Si3N4 by PECVD produces particulate in the plasma and causes flaking of deposited thin films from areas of the chamber. Special precautions are taken, such as using slow initial pumping speed to avoid disturbing particles on the chamber walls. Particles generated from film flaking present similar problems in the metal sputtering systems.

    Particles generated in CVD and sputtering cause interlevel shorts and shorts between adjacent metal lines. They can also cause opens when they fall off, or are removed from the substrate.

  2. Electrostatic charging, which causes large TFT threshold shifts and dielectric breakdowns, provides a difficult challenge unique to this transistor technology because the glass substrate is electrically insulating. As the substrates are transported inside equipment and around the clean room, friction and movement between the substrate and electrically insulating transport belts and rollers can generate extremely high voltages on the substrate. Equipment vendors have paid considerable attention to this issue, using electrically conducting parts touching the substrate and in certain cases incorporating ionizers in substrate loading and unloading stations. Shorting bars are connected to the data and scan lines around the periphery of the display and are cut after processing.
  3. Sudden changes of particle levels have been reported due to glass chipping or breaking and other issues. Substrate handling and transportation continue to be improved.
  4. There are several reports that achieving high yield in the LCD process is as challenging as in the TFT process. This is a major problem because the substrate has high cost value by the time it reaches the LCD process. Particle control at this part of the process is critical to maintaining good cell uniformity and yield.

Tables 3.3 and 3.4 show the distribution of defects in the AMLCD process. In the TFT process a defect associated with the metal X and Y address lines is the biggest issue. This is not surprising, considering that a 10-inch VGA display has over 30 meters of metal interconnect.

Particles easily stick to the glass substrate because they often have some finite residual electrostatic charge, even in the best circumstances.

Innovative testing, in-situ monitoring procedures, and improved manufacturing equipment and practices will provide significant increases in AMLCD yield. Finally, substrate cleaning techniques and substrate handling systems require further improvement.

Table 3.3
Causes of Defects in TFT LCD Manufacturing

Table 3.4
Correlation and Distribution of Defects

Published: June 1992; WTEC Hyper- Librarian