ACTIVE MATRIX LCDs

Introduction

To circumvent the reduction of contrast with increasing number of lines, Lechner et al. (1971) proposed to incorporate a switch at each picture element in a matrix display so that the voltage across each pixel could be controlled independently and the same high-contrast ratio of 100 or more, obtained in simple direct- driven displays, could in principle also be achieved for high- information-content displays.

The switch can be either a diode (two-terminal device) or a transistor (three-terminal device). Displays based on this principle are active matrix LCDs. Their fabrication requires the deposition and patterning of various metals, insulators, and semiconductors on glass substrates, comparable to the processing of integrated circuits. Brody et al. (1971) constructed the first AMLCD using CdSe thin-film transistors as the switching elements. In 1981 the first AMLCD with thin-film metal- insulator-metal diodes as the pixel switches was reported (Baraff et al. 1981). MIM diodes seemed particularly attractive for this application because they are relatively simple to fabricate and have current-voltage characteristics that are symmetric with respect to opposed polarities.

Poly-crystalline silicon (p-Si) and amorphous silicon (a-Si) devices were developed for use in AMLCDs in the early 1980s. The first LC pocket television marketed in 1984 used a p-Si TFT active matrix (Morozumi 1984). Most p-Si processes require high- temperature processing and therefore use expensive quartz substrates, but they offer the potential of integrating the drive electronics on the glass substrate.

Amorphous silicon can be easily deposited on large area inexpensive glass substrates at a temperature below 350 degrees centigrade, and can be doped p-type and n-type. Pin diodes of amorphous silicon for solar cells were developed in 1975, and their rectification ratio was improved to allow application as switches in AMLCDs (Yaniv et al. 1986b).

The first semiconductor used for TFTs in AMLCD application was CdSe. At the time, CdSe technology was not compatible with standard processing in the microelectronics industry, which uses mainly silicon as the semiconductor material. Advanced photolithographic and etching processes were adapted recently to CdSe with some very promising results (Farrell and Price 1992). LeComber et al. (1979) developed the first TFT with a-Si as the semiconductor material and suggested, as one of its applications, the active matrix LCD. In the 1980s, several companies, particularly in Japan, developed a-Si TFT LCDs, mainly for pocket TVs with 3-5" screens. Prototype displays with a diagonal size of 15" (Wada et al. 1990) and 17" were demonstrated (Sharp 1992).

Two- and Three-Terminal Devices

TFT Displays. Thin-film transistors with amorphous silicon, polycrystalline silicon, and CdSe film as the semiconductor material have been developed to function as the pixel switch. The layout of a TFT is schematically shown in Figure 3.3.


Figure 3.3. Schematics of a thin-film transistor.

Figure 3.4 shows the characteristics of an optimized amorphous silicon TFT. The on current and off current are in the microampere and picoampere range, respectively, as required. Amorphous silicon has been most successful for high resolution large area displays because of its low dark conductivity and relatively easy fabrication on large area glass substrates. Amorphous silicon TFTs with three different structures are used (Figure 3.5) (Onona 1989). In all structures the gate insulator (often SiNx, a-Si and a-Si n+ (phosphorous doped a-Si) are deposited by plasma-enhanced chemical vapor deposition (PECVD). The n+ layer provides a low resistance ohmic contact for source and drain, and suppresses hole injection at negative gate voltage. In the usual inverted staggered structure after the patterning of the source and drain metal, the n+ layer in the channel is etched and a passivation layer is deposited to protect the channel (back- channel-etched). In the trilayer type inverted staggered TFT, the active semiconductor layer is protected by being sandwiched between two insulators. Furthermore, in this configuration, the a-Si can be made thinner in order to reduce light sensitivity.


Figure 3.4. Characteristics of a-Si TFTs.


Figure 3.5. Cross sections of a-Si TFTs.

In the normal, staggered type of TFT, the light sensitivity problem is solved with the help of a light shield layer that is deposited and delineated first. Source and drain metals are then deposited and patterned, followed by the deposition and patterning of a-Si and gate insulator. The gate metal is deposited and patterned on top.

In all three processes an additional deposition and patterning step is usually necessary for the ITO pixel electrode. Metals such as Ta, Cr, MoTa and Al are used for the gates and select lines. Ta and MoTa can be anodically oxidized to provide an extra gate insulator, which virtually eliminates the occurrence of crossover shorts between select and video lines (Katayama et al. 1988). For source, drain, and video lines, Ti, Mo, Al, or Al/Cr are frequently employed.

Amorphous silicon TFTs have a field-effect mobility of 0.3-1 c2/(V-sec) and a threshold voltage Vth of about 2 V.

The mobility of p-Si TFTs is much higher, around 50 c2/(V-sec). P-Si TFTs usually have a top-gate configuration and can be fabricated in a low-temperature (600 degrees centigrade) process on hard glass substrates or in a high-temperature process (1,000 degrees centigrade) on quartz substrates.

In Figure 3.6, an example of a low- temperature p-Si TFT fabrication process is shown (Morozumi 1986). First a 1,500 phosphorus doped p-Si layer is deposited on a hard glass substrate and patterned as source-drain electrodes. Then a very thin layer (typically 250 ) of undoped p-Si is deposited by low-pressure chemical vapor deposition at 600 degrees centigrade and patterned. An ITO film is then deposited and patterned into data lines and pixel electrodes. The gate insulator of 1,500 thick SiO2 is deposited by thermal CVD. Finally, the Cr gate electrodes are sputtered and delineated. For the high-temperature p-Si TFT, the gate insulator is thermally grown at about 1,000 degrees centigrade, and source-drain doping is accomplished by ion implantation. Figure 3.7 shows the characteristics of a typical low-temperature p-Si TFT (Morozumi 1986).


Figure 3.6. Cross section of low-temperature p-Si TFT.

One of the major advantages of p-Si TFTs is their potential for integrated row and column driver circuits, which can significantly reduce the number of interconnections from the display substrate to the external electronics. For interlaced TV operation, the row drivers have to operate at 16 kHz, which requires a TFT mobility of about 0.5 c2/(V-sec). This can be achieved with both a-Si and p-Si TFTs. For the column drivers, however, the operating frequency has to exceed 8 MHz for monochrome and 23 MHz for color panels. A minimum mobility of 10 c2/(V-sec) is required, which excludes a-Si. A cross sectional view of a TFT LCD is shown in Figure 3.8


Figure 3.7. Characteristics of low-temperature p-Si TFTs.


Figure 3.8. Cross-sectional view of TFT LCD.

For color displays, red, green, and blue color filters are patterned on the top plate. In the interpixel area on the top plate, an opaque material is deposited and patterned. This black matrix improves the contrast ratio by preventing light leakage in the areas between the pixels.

MIM Diode Displays. Baraff et al. (1981) proposed to use MIM diodes as the pixel switches in active matrix LCDs. The current voltage characteristics of MIM diodes used in LCDs usually obey the Poole-Frenkel equation (Frenkel 1938), that is:

I = kV exp (bV)

where I is the current, V is the applied voltage, and k and b are constants.

MIM diodes are bidirectional switches and have approximately symmetrical current-voltage characteristics. Diodes of Ta2O5 are relatively easy to fabricate. Films of Ta are first sputtered. After patterning, the tantalum is anodized in a dilute electrolyte such as citric acid, phosphoric acid, or ammonium tartrate. During the anodic oxidation, part of the Ta film is converted into Ta2O5. For an anodizing voltage between 20 V and 50 V, a thickness of 30-700 is obtained that is suitable for application in LCDs.

The anodic oxidation process produces excellent film uniformity that is virtually pinhole free.

The metal for the counterelectrode on top of the Ta2O5 is selected to obtain symmetric current voltage characteristics (Morita et al. 1990). Titanium, chromium, and aluminum give good results, whereas molybdenum and indium tin oxide produce asymmetric curves with partially rectifying behavior.

The nonlinearity factor b (4 for Ta2O5 can be improved using alternative insulators. One of them is off-stoichiometric silicon nitride (SiNx produced by PECVD (Suzuki 1986). The I-V characteristics of SiNx diodes can also be fitted to the Poole-Frenkel equation. The factor b increases with increasing nitrogen content in the film and ranges from 4.5 to 6, significantly higher than for Ta2O5 MIM diodes. Figure 3.9 shows the I-V characteristics of a typical SiNx and Ta2O5 MIM.

In a diode active matrix display, rows and columns are usually on opposite glass substrates, eliminating the possibility of crossover shorts. This is illustrated in Figure 3.10. The select waveforms are applied to the rows, and the data voltages are applied to the columns. The diodes can be connected either to the row lines or to the column lines. The diode has a parasitic capacitance, and since diode and LC capacitance are in series, any voltage change on the columns or rows will be partially absorbed by the LC capacitance (Figure 3.10). This capacitive charge transfer depends on the ratio of device capacitance to LC capacitance. To reduce cross talk from the column lines, it is important to keep this ratio small.


Figure 3.9. Current voltage characteristics of SiNx and Ta2O5 MIMs.


Figure 3.10. Circuit diagram of a pixel and the MIM structure in a MIM diode display.

Since Ta2O5 has a high dielectric constant of 22-25, the MIM device area has to be kept small to satisfy the condition Cdiode/Clc < 0.1. Photolithographic limitations on large area substrates, however, make it difficult to reduce their size to less than 4 x 4 (meters squared). To circumvent this problem, attempts have been made to fabricate lateral MIM devices, in which the sidewall of the Ta pattern is used for the device (Morozumi 1983) and the device capacitance can be smaller. SiNx MIMs (Suzuki 1986) share the advantage of a lower dielectric constant ( approx. 7), and the device capacitance is a less significant problem than in Ta2O5 MIM LCDs.

Pin Diode Displays. Amorphous silicon pin diodes are fabricated by PECVD with silane (SiH4) as a precursor for the undoped i layer (intrinsic) and mixtures of SiH4 and B2H6 or PH3 for p-type and n-type layers, respectively. To avoid cross- contamination of doped and undoped layers, the films are deposited in a multichamber system with separate chambers for p, i, and n layers. The i layer has a thickness of 2,000-6,000 , and the doped layers are about 500 thick.

Figure 3.11shows the current voltage characteristic of a typical optimized pin diode with an area of 20 x 20 (meters squared) (Yaniv 1986a). The ratio between forward and reverse currents at +3 V and -3 V exceeds 8 orders of magnitude. The forward curve up to +1 V is described by the usual diode equation:

I = Io [exp(qV/nkT)-1]

where Io is the saturation current and n is the ideality factor. For optimized diodes, the saturation current density is 10-13-10-11 A/c(meters squared) and n is 1.3-1.5.

At reverse bias the current is very low, since the p and n layers effectively block the injection of electrons and holes from the contacts and the i layer is depleted of charge carriers. At high reverse bias, around 20 V, the current can increase sharply and soft breakdown occurs. This soft breakdown is reversible, and the voltage at which it takes place depends on i layer thickness and other deposition parameters.

The a-Si diode has asymmetric current voltage characteristics with rectifying behavior. A single diode per pixel is therefore not compatible with the ac drive of LCDs. Any AMLCD with pin or Schottky diodes requires at least two devices per pixel. When two diodes are used in the back-to-back configuration of Figure 3.12, the soft breakdown of the diodes can be used to obtain a symmetric switch with current voltage curve very similar to that of MIM diodes. Since uniformity and reproducibility of soft breakdown are poor, displays based on this approach have not been successful.

By connecting two diodes in an antiparallel fashion (Figure 3.12, a symmetric nonlinear device is obtained. This diode ring configuration has been applied by several organizations (Togashi et al. 1985; Urabe 1989).


Figure 3.11. Current voltage characteristic of 20 m pin diode.


Figure 3.12. Diode ring (a) and back-to-back diode (b) configurations.

The I-V characteristic of the diode ring has a low threshold voltage of about 1 V, incompatible with the higher threshold voltage of the TN LC cell of 2-3 V. To suppress leakage through the switch during the holding period, a holding voltage, sometimes also employed in MIM diode displays, is essential for the select line driving waveform in diode ring displays.

The diode ring configuration utilizes only the forward characteristics of the diodes, and hence does not take full advantage of the high on/off current ratio of a-Si pin diodes. A configuration that uses both forward and reverse characteristics (Yaniv et al. 1986b, 1988) is the two-diode switch, depicted in the circuit diagram of Figure 3.13. Each pixel has two diodes, which are connected to different select lines. The anodes of diodes D1 are connected to the select lines S2, and the cathodes of diodes D2 are connected to select lines S2. One of the driving methods is shown in Figure 3.13.


Figure 3.13. Two-diode switch configuration operated in the alternate scan mode.

For the purpose of device redundancy, two or three diodes can be connected in series in each branch (Yaniv 1988). When one diode is short-circuited, the other two diodes in the branch will prevent the occurrence of a pixel defect. The increased number of diodes per branch has the added benefit of reducing the effective overall device capacitance and of reducing the maximum reverse bias per diode. As mentioned before, a-Si pin diodes can suffer from soft breakdown at high reverse bias. The series connection of three diodes virtually eliminates this effect.

The two-diode switch approach requires two select lines for each row of pixels and therefore doubles the number of interconnections and driver circuits for rows. The D2R (double diode plus reset) circuit proposed by Philips (Kuijk 1990) does not suffer from this drawback.

Arrays of pin diodes for displays require three to four photolithography steps. The processes for diode ring, back-to- back diodes, or two-diode switch displays can be basically the same. In one commonly used process, the ITO layer is patterned first, followed by deposition of the sandwich Cr-pin-Cr (Figure 3.14). The top Cr is patterned and used as a mask to etch the a-Si layer in a dry etching process. The bottom metal is then patterned. A silicon nitride layer is deposited, and contact holes are opened on top of the diodes. Finally, a top metal such as Al, Mo, or Ni is deposited to connect the diodes and to form the bus lines. The bus lines consist of a double metal layer of the bottom metal and the top metal. This line redundancy increases the yield. The diodes are shielded from light because they are completely encapsulated by the metal electrodes.


Figure 3.14. Cross section of pin diode display.


Published: December 1994; WTEC Hyper-Librarian